Jiwon Lee

About Me

Profile photo
  • jiwon.lee at it.uu.se
  • jiwon24.lee at gmail

I am a Postdoctoral Researcher at Uppsala University with research interests in computer architecture and systems. I received my Ph.D. from Yonsei University, where my dissertation was titled “High-Performance Address Translation Mechanisms for Graphics Processing Units.”

Building on my doctoral work in GPU address translation, my research has expanded to a broader range of architectural problems through both primary research and collaboration. My previous work includes GPU memory systems, unified virtual memory, multi-GPU systems, and memory expansion, while my current research focuses more on CPU microarchitecture.

Professional Experience

Postdoctoral Researcher
Uppsala University, Department of Information Technology, Uppsala, Sweden
Division of Computer Systems; Uppsala Architecture Research Group (UART)
Hosted by Professor David Black-Schaffer; collaborating with Professor Chang Hyun Park
Staff Engineer
Samsung Electronics, Memory Division, South Korea
Graduate Research Assistant
Yonsei University, School of Electrical and Electronic Engineering, Seoul, South Korea
Embedded Systems and Computer Architecture Lab (eSCaL)
Advisor: Professor Won Woo Ro

Education

Ph.D. in Electrical and Electronic Engineering
Yonsei University, Seoul, South Korea
Dissertation: "High-Performance Address Translation Mechanisms for Graphics Processing Units."
Bachelor of Science in Electrical and Electronic Engineering
Yonsei University, Seoul, South Korea

Publications

  1. Maverick: Leveraging Address Translation to Mitigate Memory Latency in Server Workloads , , , , , , , and IEEE/ACM International Symposium on Microarchitecture (MICRO), 2026.
  2. SAPPhire: Practical Tiered Memory Systems with Memory Availability Prioritization [DOI] , , , , , , and IEEE Transactions on Emerging Topics in Computing (TETC), 2026.
  3. REDIT: Redirection-Enabled Memory-Side Directory Architecture for CXL Memory Fabric [DOI] , , , , , , , and IEEE Computer Architecture Letters (CAL), 2025.
  4. Understanding Distributed Training of Large Language Models with Unified Virtual Memory [DOI] , , , and IEEE International Symposium on Workload Characterization (IISWC), 2025.
  5. LATPC: Accelerating GPU Address Translation Using Locality-Aware TLB Prefetching and MSHR Compression [DOI] , , , , , , and IEEE/ACM International Symposium on Microarchitecture (MICRO), 2025.
  6. Heliostat: Harnessing Ray Tracing Accelerators for Page Table Walks [DOI] , , , , and IEEE/ACM International Symposium on Computer Architecture (ISCA), 2025.
  7. COSMOS: An LLC Contention Slowdown Model for Heterogeneous Multi-core Systems [DOI] , , , , , , and IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2025.
  8. HashScape: Leveraging Virtual Address Dynamics for Efficient Hashed Page Tables [DOI] , , , , and IEEE Transactions on Computers (TC), 2025.
  9. Marching Page Walks: Batching and Concurrent Page Table Walks for Enhancing GPU Throughput [DOI] , , , , , and IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2025.
  10. REC: Enhancing Fine-Grained Cache Coherence Protocol in Multi-GPU Systems [DOI] , , , , and Journal of Systems Architecture (JSA), Vol. 160, 103339, Mar. 2025.
  11. Geneva: A Dynamic Confluence of Speculative Execution and In-Order Commitment Windows [DOI] , , , , and IEEE/ACM Design Automation Conference (DAC), 2024.
  12. SnakeByte: A TLB Design with Adaptive and Recursive Page Merging in GPUs [DOI] , , , , and IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2023.
  13. Early-Adaptor: An Adaptive Framework for Proactive UVM Memory Management [DOI] , , , , , and IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2023.
  14. Analysis on Memory Access Patterns of Server-Class Workloads in Page- and Cache Line- Granularity , , , and International Conference on Electronics, Information, and Communication (ICEIC), 2023.
  15. Performance Analysis of Criticality-Aware Out-of-Order Cores for Exploiting MLP [DOI] , , and International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 2023.
  16. Adaptive Data Prefetcher with Probability Learning in LLC [DOI] , , and International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 2023.
  17. Reconstructing Out-of-Order Issue Queue [DOI] , , , and IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022.
  18. Analysis of DRAM-based Network of DRAM Swap Space Adopting Latency Hiding Technique [DOI] , , , and International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 2022.
  19. PIMCaffe: Functional Evaluation of a Machine Learning Framework for In-Memory Neural Processing Unit [DOI] , , , , and IEEE Access, Vol. 9, pp. 96629–96640, Jul. 2021.
  20. Chapter Six – Deep learning with GPUs [DOI] , , , , , and Advances in Computers, Vol. 122, pp. 167–215, 2021.

Patents

  1. Memory management unit and method of walking page table [Link: US, CN, KR] , , , , , and US 18/502,058, CN 202311700848.0, KR 10-2022-0175909
  2. Swap memory device providing data and data block, method of operating the same, and method of operating electronic device including the same [Link: US, CN, KR] , , , and US 18/350,148, CN 202311408257.6, KR 10-2022-0145399
  3. Controller, computing system including the same, and method of creating and searching page table entry for the same [Link: US, CN, KR] , , , and US 17/526,391, CN 202210082121.X, KR 10-2021-0054195
  4. Computing device and method of operating the same , , , and KR 10-2023-0193178
  5. Memory management apparatus and method for UVM , , , , and KR 10-2023-0076606
  6. Neural network processing method , , , , , and KR 10-2022-0041848

List of Ongoing Research

  • Efficient Memory Management of Large-Scale Memory Space
  • Accelerating Sparse Matrix Computations
  • Application of IOMMU Specifications
  • Identifying Bottlenecks in Serverless Environments
  • Analysis on Different Sparse Matrix Formats

Projects

  • Development of High Performance Multi-GPU Memory System, National Research Foundation of Korea (NRF), Mar. 2021 – Feb. 2024
  • Development and Application of DRAM-based Memory Hierarchies, Samsung Electronics, Sept. 2020 – Aug. 2023
  • Programmable Neural Network Processors, Samsung Research Funding and Incubation Center for Future Technology, June 2018 – May 2022
  • PIM Core Technology and System Development for Data-intensive Applications, Samsung Electronics, Mar. 2018 – Mar. 2020
  • Development of Reconfigurable Artificial Neural Network Accelerator and Instruction Set Architecture, Korea Electronics Technology Institute (KETI), Mar. 2018 – Feb. 2019

Academic Activities

Academic Service

  • External Review Committee, ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Summer Cycle 2026
  • Reviewer, ACM Transactions on Architecture and Code Optimization (TACO), 2025

Mentorship

  • Embedded Systems and Computer Architecture Lab, Yonsei University
    Industry–Academic Mentoring Program, 2024
  • Intelligence System and Parallel Computer Architecture Lab, Ewha Womans University
    Industry–Academic Mentoring Program, 2025

Teaching Assistant

  • EEE6611, System Design and Applications Lab, Yonsei University, Fall 2019
  • EEE4473, Embedded System Lab, Yonsei University, Spring 2019
  • EEE3535, Operating Systems, Yonsei University, Fall 2018

Scholarships and Awards

  • Memory Division Graduate Fellowship, Samsung Electronics, Sept. 2023 – Aug. 2024
  • Excellent Graduate Researcher Scholarship, Yonsei University, Feb. 2023
  • National Scholarship for Science and Engineering, Korea Student Aid Foundation (KOSAF), Mar. 2014 – Feb. 2018
  • Academic Excellence Award, Yonsei University, Spring 2014

After Hours

Outside of research, I enjoy playing electric guitar and listening to guitar-driven music. I often rehearse and play cover songs with my former university bandmates, and we’ve had many great sessions together in rehearsal studios. When I’m practicing solo, I usually pick a song and work through it on my own. As a big fan of rock and heavy metal, I tend to gravitate toward technically demanding pieces that can take months to master. But finally nailing them is always incredibly rewarding. Lately, I’ve also been exploring a broader range of music—from Korean indie bands like Decadent and Life and Time to genres such as fusion and blues. These days, I’m working on The Lights Behind You by SURL. Keeping this mix of styles helps me stay inspired and continuously expand my musical vocabulary.

Photo of me playing an electric guitar on a stage
Me playing on stage in Sept. 2018
Photo of my 12-year-old electric guitar and amp
My 12-year-old guitar and amp